Excellence lives on exchange and networking among the best researchers worldwide. That is why we want to invite you to join us in a new lecture series, International Excellence Talks, where internationally renowned scientists will give insights into their current research topics and, ideally, inspire a broad audience of scholars. This monthly event will include a 30-minute keynote lecture and a platform for networking and informal exchange among researchers with a wide range of interests. Recordings of previous talks can be found at KIT International Excellence Talks YouTube Channel.

Abstract: 

The two major drivers for quantum computing have been the need to overcome the limitations of classical deterministic digital computers in terms of both computational complexity and the technology for building them. 

First, we delve into the basic model of quantum computing. Next,  we give a snapshot of the application domains where for certain problems remarkable speed-up over classical computing have been achieved by quantum computing. 

Then, the progress in technology is sketched briefly.  Finally, we present the specific challenges in designing efficient quantum circuits comprising a cascade of gates (primitive quantum operations) in order to realize quantum computing taking its inherent error-prone nature.

Biography: 

Prof. Susmita Sur-Kolay received the B.Tech.(Hons.) degree in Electronics and Electrical Communications Engineering from Indian Institute of Technology Kharagpur and the Ph.D. degree in Computer Science and Engineering from Jadavpur University India. She has been a faculty member in the Advanced Computing and Microelectronics Unit of the Indian Statistical Institute, Kolkata, India since 1999 and is presently a Professor. During the period 1993-99, she was a Reader in the Department of Computer Science and Engineering of Jadavpur University. Prior to that, she was a post-doctoral fellow at University of Nebraska-Lincoln, and a Research Assistant at the Laboratory for Computer Science in Massachusetts Institute of Technology. She was also on sabbatical at Princeton University and Intel Corp., USA. She is presently a KIT International Excellence Fellow.

Her research contributions are in the areas of algorithmic design automation for VLSI physical design, fault modeling and testing, synthesis of quantum computers, and graph algorithms. She has co-authored several technical papers in leading international journals and refereed conference proceedings, and a chapter in the Handbook on Algorithms for VLSI Physical Design Automation. She was the Technical Program Co-Chair of the 18th International Conference on VLSI Design (2005), the 11th Symposium on VLSI Design and Test (2007), ISVLSI 2011 and has served on the program committees of several international conferences. She has served on the editorial board of the IET Computers and Digital Techniques, and IEEE Transactions on VLSI Systems. She is a Distinguished Visitor of IEEE Computer Society (India), Senior Member of IEEE, Fellow of Indian National Science Academy and of Indian National Academy of Engineering, Member of ACM, IET and VLSI Society of India. Among other awards, she was the recipient of the President of India Gold Medal (summa cum laude) at IIT Kharagpur (1980), IBM Faculty Award (2009), Distinguished Alumnus Award (2020), Women in Technology Leadership from VLSI Society of India 2022.